Ricci, Ing Stefano and Guidi, Ing Francesco and Tortoli, Prof. Piero (2000) Assembly optimised FFT algorithms for TMS320C62 processors. The European DSP Education and Research Symposium (EDERS), Parigi.
Severe speed and dynamic range requirements are often imposed to the FFT algorithms necessary in modern communication systems. In this paper we discuss hand-optimised assembly codes for fixed-scaling and block-floatingpoint FFT algorithms providing 90% speed improvement with respect to the codes produced by TI C-development tools. Their use in a TMS320C6202-based system designed in our laboratory for range-Doppler applications is also described.